This project has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreements 871130 and 654384.
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Previous Issues:
Jul 2021 | Mar 2021
Jul 2019 / Apr 2019 / Jan 2019 / Oct 2018 / Jul 2018 / Apr 2018 / Jan 2018 / Oct 2017 / Jul 2017 / Apr 2017 / Jan 2017 / Sep 2016 / Jun 2016 / Feb 2016
This project has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreements 871130 and 654384.
Facilities
Ascent+ Showroom
CEA-Leti | Fraunhofer Mikroelektronik | imec | INL | Tyndall
ASCENT+ serves as the direct entry point to a European Nanoelectronics Research Infrastructure of global scale offering access to key enabling capabilities in state-of-the-art processing, modelling and simulation data sets, metrology and characterisation, and devices and test structures.
ASCENT+ provides access to research infrastructures within key enabling capabilities:
- Processing
- Modelling / Databases
- Metrology / Characterisation
- Devices / Test structures
giving access and enabling research in the following Platform Technologies:
- Nano for Quantum Technologies
- Disruptive Devices
- Advanced Integration
| Enabling Capabilities | Platform Technologies | ||
|---|---|---|---|
| Nano for Quantum Technologies | Disruptive Devices | Advanced Integration | |
| Processing | – Quantum nanostructures (using MOVPE, ALD/E, EBL) – Diamond growth, 3D shaping and membrane fabrication – Graphene-based device processing on 200mm wafers – Sub-nm material deposition |
– Flexible Fabrication including e-beam lithography – Nanowires and 2D materials – Sequential 3-D – Graphene-based devices – Material stacks for memory – Spintronic devices on 200mm wafers |
– GaN on SOI MPW – 3-D packaging: µBump, Cu pillars, TSV – Nanophotonics integration – Ferroelectrics integration – Chemical functionalisation to integrate novel materials – Epitaxial growth on SiC – Novel memories – Package integration including on advanced Silicon devices – Flexible fabrication on multiple substrates |
| Modelling / Databases | – Modelling based on group-IV, group-III and group-V materials – Intrinsic defect modelling – Nanostructure modelling based on range of materials & alloys |
– Compact models for memory materials – Device models across a range of advanced devices – Device simulations – Atomistic calculations for novel devices – Spintronics modelling – Thermoelectric modelling – Ferroelectric doping profiles |
– PDK for 200V GaN on SOI – Electro-thermal modelling – Electronic transport properties – CMP modelling algorithms – Thermal modelling of integrated structures – Integrated devices design expertise |
| Metrology / Characterisation | – Cryogenic optical measurement – Unique Low temp (<4K) physical and chemical characterisation – Physical characterisation (SIMS, Atom probe, Xray, extensive microscopy, Raman, etc.) – Magnetic characterisation – Solar simulator – Kelvin probe – Cryo/magnetic electrical test-bed (due in 2020) |
– Extensive electrical and Physical characterisation on hundreds of tools including TEM, HR-SEM, AFM, FIB, ion beam, Xray, surface analysis, etc. – Nanoferroics characterisation – Picoprober for unconventional probing – Spintronics device characterisation in a magnetic field – Advanced EM and spectroscopic imaging – Defects Characterisation – RF characterisation |
|
| Devices / Test structures | – Quantum dots and devices – Diced chips with option for customised wire bonding |
– 14nm FinFET devices – Advanced node test structures – Stacked nanowire CMOS on SOI – 28nm gate length 3D sequential technologies – Advanced logic and memory (OXRAM, etc) – Low-dimensional FETs – Diced chips with various spintronic device arrays |
– Devices from process development lines – Demonstrator circuits – Hybrid MEMS+ devices Monolithic integration – 22nm test chips to test new integration concepts |
| Nano for Quantum Technologies | Disruptive Devices | Advanced Integration | |