PiezoMEMS
Evatec Clusterline - 8" process
8" ScAlN-based piezoMEMS process - Single electrode layer stack
8" ScAlN-based piezoMEMS process - Dual electrode layer stack
4" AlN-based piezoMEMS process: SOI

PiezoMEMS

Access to Tyndall piezoMEMS processing

Material piezo stack
8″ wafer, piezo layer: ScAlN

  1. Single electrode layer stack: optional Thermal oxide layer
  2. Dual electrode layer stack
PiezoMEMS structures fabrication
4″ wafer, piezo layer: AlN

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Description

PiezoMEMS processing

Material Stack
Silicon substrate with an optional thermal oxide layer followed by the piezo electric layer of AlScN with a top molybdenum electrode. 8″ wafer

  • Single electrode layer stack
  • Dual Electrode layer stack
PiezoMEMS Structures Fabrication
Piezoelectric MEMS process that combines surface and bulk micromachining to create free standing structures such as piezoelectric cantilevers or membranes for different applications. This process is on 4″ wafer (SOI Substrate) and the piezo layer can be AlN or ScAlN

Specifications
Piezoelectric material properties: d33 in the range of 5 to 6 pC/N
Device properties are design dependent

Ascent+ facility
Tyndall

Platform Technologies

  • Nano for Quantum Technologies
  • Disruptive Devices
  • Advanced Integration

Key Enabling Capability

  • Processing
  • Devices / Test structures

Additional information

Key Enabling Capability

Devices / Test Structures, Processing
Platform Technology

Advanced Integration, Disruptive Devices, Nano for Quantum Technologies
Facility

Tyndall

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