GaN-IC MPW

You can design and fabricate highly integrated GaN power systems on chip using imec’s 200V and 650V GaN-IC platform through the Multi-Project Wafer (MPW) service. Imec’s unique GaN-on-SOI process implements trench isolation to achieve full isolation between power devices, drivers, control, and protection circuits.

GaN-IC MPW shuttles

Imec’s GaN-on-SOI IC technology circumvents the limitations of GaN discrete components, allowing designers to monolithically integrate components such as half-bridges and GaN drivers onto the same die, minimizing parasitic inductance.

To make this technology available, imec provides extensive GaN-on-SOI Process Design Kits (PDK) for 200V and 650V technologies. These kits include process documentation, library devices, layout guidelines for custom design, verification, and models.

Low-ohmic and high-ohmic resistors are provided as well as Metal/Oxide/Metal capacitors and low voltage logic devices. These enable you to design highly integrated GaN power systems on chip.

The design is fabricated as part of one of the GaN-IC MPW runs at imec. Access to imec’s GaN-IC MPW PDKs after signature of the Design Kit License Agreement. Participants receive a set of bare dies after ~30 weeks after the submission of their GDS. [Run Schedule]

For more information, click here.


Keywords
GaN IC, PDK, MPW, power electronics


Specifications

  • PDK: 200V and 650V
  • Sample size: 5.18mm × 5.18mm
  • Samples/design: 50 to 100

200V e-MODE p-GaN HEMT Datasheet Power Device with Weff=36mm

Symbol Description Test Conditions Min Typ Max Unit
Absolute Maximum Ratings
BVDS Drain-Source voltage 200 V
ID Pulsed Drain Current 1 ms pulse 10 A
VGS Gate-Source voltage 7 V
On/Off state characteristics
BVDS Drain-Source voltage VGS=0V, ID=1µA/mm 200 V
IDSS Drain-Source leakage VGS=0V, VDS=200V 0.5 µA
IGSS Gate-Source leakage VGS=0V, VDS=200V 0.27 µA
RDS-ON Drain-Source ON resistance VGS=7V, ID=2A 0.16 Ω
VTH Gate-Source voltage maximum gm 2.3 V
VDS=0.1V, ID=10µA/mm 1.3 V
Dynamic Characteristics
CISS Input capacitance VGS=3
VDS=200V
f=1MHz
55 pF
COSS Output capacitance 35 pF
CRSS Reverse transfer capacitance 0.97 pF

650V e-MODE p-GaN HEMT Datasheet Power Device with Weff=36mm

Symbol Description Test Conditions Min Typ Max Unit
Absolute Maximum Ratings
BVDS Drain-Source voltage 650 V
ID Pulsed Drain Current 1 ms pulse 7.5 A
VGS Gate-Source voltage 7 V
On/Off state characteristics
BVDS Drain-Source voltage VGS=0V, ID=1µA/mm 650 V
IDSS Drain-Source leakage VGS=0V, VDS=650V, T=25°C 100 1000 nA/mm
VGS=0V, VDS=650V, T=150°C 50 500 nA/mm
IGSS Gate reverse leakage VGS=0V, VDS=650V, T=25°C 50 500 µA
RDS-ON Drain-Source ON resistance VGS=7V, VDS=0.1V, T=25°C 14 18 Ω.mm
VGS=7V, VDS=0.1V, T=150°C 30 35 Ω.mm
VTH Gate threshold voltage maximum gm 2.1 2.5 2.9 V
Dynamic Characteristics
CISS Input capacitance VGS=0
VDS=650V
f=1MHz
47.2 pF
COSS Output capacitance 14.6 pF
CRSS Reverse transfer capacitance 0.12 pF

Ascent+ facility
imec

Platform Technologies

  • Advanced Integration
  • Disruptive Devices

Key Enabling Technologies

  • Devices / Test structures
  • Processing

Typical Applications

  • High frequency power converters
  • Analog functions, protection circuits → Monolithic buck convertors
  • Diagnostic and protection circuits → Undervoltage lock-out, over-temperature protection, over-current-protection

Publication
[DOI: 10.1109/IEDM19573.2019.8993572]

Key Enabling Capability

Devices / Test Structures, Processing

Platform Technology

Advanced Integration, Disruptive Devices

Facility

imec