4H-SiC Line
4H-SiC Epitaxy
Defect engineering by PL scanning
Back side grinding and laser anneal
Electrical testing up to 500°C

4H-SiC Line

Platform for manufacturing of power devices, high temperature circuits and sensors on 150mm 4H-SiC wafer including epi growth, defect analysis, back side thinning, packaging and electrical characterization, especially for temperatures above room temperature.

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Description

SiC-device manufacturing platform

Especially in the field of power electronic devices in the voltage range from 1 to 10kV, 4H-SiC is the semiconductor of choice for fabrication of such devices. Due to the rather high defect density in the 4H-SiC substrate material compared to silicon, it is important to cover all the fabrication steps like defect control, epitaxy, device manufacturing, wafer thinning, packaging, electrical characterisation and device design on one single platform. This platform is qualified for 150mm wafer diameter and will be used for sensor development and high temperature (up to 500°C) circuit evolution, too.

Our focus is the development of customer specific devices as test vehicles or prototypes up to small volume production, especially for SMEs. Based on ISO 9001 qualified process modules, describing a base line, various device concepts can be offered for qualified manufacturing.

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Tools
150 and 200 mm epitaxy line, defect inspection, 150mm device manufacturing line, wafer thinning equipment, packaging, electrical characterization up to 10kV and 1500A on wafer level

Specifications

Technology specs
  • 0.8µm min feature size, 300nm accuracy
  • VTh > 2V
  • µFE = 18 – 20 cm2 / Vs @ 20 V
  • Contact resistance < 50µΩcm2
  • Drift resistance (RT / 130°C) < 1kΩ/sq. / 0.8kΩ/sq
Device specs
  • JBS diodes: 600V – 3.3kV, trench patterns, implanted JTE and field rings
  • VDMOS: 1.2 – 3.3 kV, trench MOS
  • CMOS: 5 – 20V
  • Sensors: Temperature, UV, magnetic field, quantum
High Temperature (HT) electrical characterization
Facility for electrical measurements for temperatures up to 500°C for wafers (up to 100mm, no automated measurements on wafer level) and dies: IV and CV on lateral or vertical devices (voltage and current levels for power devices to be discussed)

Ascent+ facility
Fraunhofer IISB

Platform Technologies

  • Nano for Quantum Technologies
  • Disruptive Devices
  • Advanced Integration

Key Enabling Capability

  • Processing: Power devices, High temperature CMOS, Sensor and Quantum Technologies

Case Study

Fraunhofer offers 4H-SiC device manufacturing to partners which do not have own possibilities or are looking for qualified and/or small volume manufacturing.

Additional information

Key Enabling Capability

Metrology / Characterisation, Processing
Platform Technology

Advanced Integration, Disruptive Devices, Nano for Quantum Technologies
Facility

Fraunhofer Mikroelektronik

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