imec Offerings (ASCENT+ Showroom)

Research Facilities

300mm research facility
  • Fully equipped state-of-the-art processing equipment including the world’s most advanced litho clusters
  • Cleanroom: >4,000 m2 ballroom style; class 1,000; vibration class D and better for 300mm process equipment
  • FOUP wafer transport with mini-environments up to class 1 (300mm SMIF)
  • 3-level cleanroom with fab level for process equipment, sub-fab level for supporting equipment and lower level for
    utilities
  • Ultrashort cycle time
  • Fully single wafer (wherever possible)
  • Fully SPC controlled
  • Trained operator force at full continuous operation (24hrs/7days)
200mm research facility
Imec’s 200mm silicon pilot line is about 1,750 m2 and is class 1. It is run in a continuous operation (7/7 days, 24/24
hours) using operators and a fully automatic manufacturing execution system (FAB300). IMEC’s CMORE initiative;
run in 200mm facility; offers cost-effective solutions for monolithic co-integration of heterogeneous technologies.

14nm and below

imec offers access to its current 14nm and below CMOS FinFET 3D fully depleted technology

Access provided to FinFET test structures, measurements, and data. These test chips include test structures for electrical characterization of advanced technology node devices using a large set of key design of experiments to perform electrical measurements of the important device performance elements for both DC and AC operations:

  • Test structures from the advanced node devices available to users
  • imec will make and provide specific measurements when data is not yet available (and presuming the relevant test structure is available)
  • Access to external researchers to make specific measurements
  • Access to the electrical characterization data for the available test chips
  • Access to basic process technology information (for example oxide thickness, fin height metrology, physical analysis,..). imec will provide sufficient technology insights to analyse the electrical data and get an in-depth physical interpretation of the electrical evaluations where possible, however the technology details cannot go beyond pre-existing confidentiality agreements with third parties

FinFET Test chips

  • Documentation of process assumptions for the test chips
  • Inventory of test structure types available on the test chips

imec has a wide range of test chips with relevant features for future technologies foreseen for 14nm CMOS and below for:

  • FinFET 3D fully depleted devices
  • Local interconnects
  • Replacement Metal Gate (RMG) gate-last metal gate
  • Mobility booster elements

GaN-on-Si Power Devices

GaN-on-Si power devices have been accepted by industry as a breakthrough power electronics component, because the combination of the unique materials properties and the High Electron Mobility Transistor (HEMT) device architecture results in power devices with disruptive characteristics, especially with respect to power density and fast commutation speed. However, most components today are offered as discrete off-the-shelf components.

To unlock the full potential of the GaN technology, monolithic integration of the drivers, half-bridges, overvoltage protection circuits, level shifters, etc. are required to provide unprecedented performance in speed, cost reduction and form-factor reduction of the next generation power systems. Imec has developed a unique GaN-on-SOI technology platform that allows the co-integration of enhancement mode low-side and high-side power switches, logic low voltage GaN transistors, high ohmic and low ohmic resistors and back-end capacitors, and temperature sensors. By giving access to both reference GAN-IC samples and area on MPW mask sets for new designs, supported by release of PDK for GaN ICs using the GaN-on-SOI technology, a unique opportunity is created to foster innovative GaN IC designs and application circuits in the wider field of power electronics by universities and SMEs.

The offer is two-fold:

  1. Samples of reference monolithic integrated half-bridges (symmetric and asymmetric), power devices with integrated driver and half-bridges with integrated drivers, with documentation on layout and electrical characteristics, materials characteristics and compact models.
  2. Access to MPW shuttles for innovative designs, based on the released PDK, which includes models, design rule check, layout versus schematic check and parasitics extraction, for designs in the Cadence/Calibre environment.

3D and Advanced Packaging

3D and Advanced Packaging are becoming a key scaling enabler with the challenges being faced by traditional Moore’s Law scaling reaching its apparent limits through traditional transistor scaling. The ability to partition systems, enabling improved Power, Performance, Area of Si used and Cost improvements through the use of TSV (Through Silicon Vias) and micro bumping technology is rapidly obtaining industrial R&D acceptance. One of the key challenges for researchers is to gain access to TSVs and uBumps to enable them to experiment with them. Typically these modules are not easily available to academics within an affordable price bracket. With imec’s well publicised 3D program having run successfully for more than 10 years, we are in a perfect position to enable European based researchers to have access to some of our developed technologies for further research.

The offer is 3-fold:

  1. µBump samples will be available at both 20µm pitch and 40µm pitch
  2. Cu pillar samples will be available
  3. TSV Middle samples will be available at 5µm × 50µm

Services on Offer

The services offered range from development-on-demand, over prototyping, to low-volume production. Both clean room areas and test facilities areas are used for the work with industrial partners and wafers are regularly exchanged with industrial facilities as all protocols for contamination control and traceability are in place. Next to the industrial R&D programs; the currently running industrial prototyping platforms are:

  • 200mm GaN-on-Si platform; GaN-IC MPW
  • Design and development of manufacturing processes for MEMS, micro-devices and specialty components in Si CMOS such as sensors and detectors in the 200mm fab
  • CMOS image sensor technology platform in the 200mm fab
  • 200mm wafer Si photonics manufacturing platform

Access to the GaN-IC technology of imec is a newly added offering, which was previously not accessible to the wider community. To foster innovation in wide bandgap high-end power systems, imec offers GaN-IC demonstration samples and access to MPW service.