Priority Call: 14nm PDK/electrical data
Themed Proposal Call – Q2/2017
A call for proposals targeted at researchers looking for 14nm PDK / electrical characterisation data is currently open. These proposals will be given priority until Friday 30th June. Submission is an easy and straightforward process, click HERE for details.
This is a new extra option for researchers to engage with ASCENT. Until the end of June 2017 ASCENT will give priority to researchers interested in access to ASCENT Data.
Virtual Access (VA)
Researchers can access data from both imec and CEA-Leti test chips.
- Test chips Documentation and Data (imec)
- FinFET and GAA test chip documentation and DATA
- III/V InGaAs GAA test chip documentation and DATA
- PLANAR test chip documentation and DATA
- Material for Device Analysis (CEA-Leti)
- SPICE models and model cards for 14nm FDSOI and below.
- Process Development Kit (TCAD decks):
- 14nm FDSOI MOSFET,
- Trigate SOI Nanowire and
- GAA Nanowire MOSFET (mainly electrostatics)
To gain access simply complete this Enquiry Form
Deadline: 30th June 2017
ASCENT provides a European-wide direct access route to sub 10 nm nanoelectronics, ‘Beyond CMOS’ devices, and opens the possibility to develop ‘More than Moore’ capabilities such as nanowire and 2D sensors for research organizations and universities, by capitalising on the globally-leading advanced nanoelectronics platforms made possible through the ASCENT infrastructure consortium.
ASCENT offers trans-national access and virtual access activities, supporting the wider European nanoelectronics research and academic communities by delivering access to:
- State-of-the-art research infrastructure through provision of test structures and electrical characterisation equipment.
- Virtual Access
- TCAD models and compact models. Test/characterisation data.